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19-1977; Rev 3; 2/03
0.5/0.8 Low-Voltage, Dual SPDT Analog Switches in UCSP MAX4684/MAX4685
General Description
The MAX4684/MAX4685 low on-resistance (RON), lowvoltage, dual single-pole/double-throw (SPDT) analog switches operate from a single +1.8V to +5.5V supply. The MAX4684 features a 0.5 (max) RON for its NC switch and a 0.8 (max) RON for its NO switch at a +2.7V supply. The MAX4685 features a 0.8 max onresistance for both NO and NC switches at a +2.7V supply. Both parts feature break-before-make switching action (2ns) with tON = 50ns and tOFF = 40ns at +3V. The digital logic inputs are 1.8V logic-compatible with a +2.7V to +3.3V supply. The MAX4684/MAX4685 are packaged in the chipscale package (UCSP)TM, significantly reducing the required PC board area. The chip occupies only a 2.0mm 1.50mm area. The 4 3 array of solder bumps are spaced with a 0.5mm bump pitch.
Features
12-Bump, 0.5mm-Pitch UCSP NC Switch RON 0.5 max (+2.7V Supply) (MAX4684) 0.8 max (+2.7V Supply) (MAX4685) NO Switch RON 0.8 max (+2.7V Supply) RON Match Between Channels 0.06 (max) RON Flatness Over Signal Range 0.15 (max) +1.8V to +5.5V Single-Supply Operation Rail-to-Rail(R) Signal Handling 1.8V Logic Compatibility Low Crosstalk: -68dB (100kHz) High Off-Isolation: -64dB (100kHz) THD: 0.03% 50nA (max) Supply Current Low Leakage Currents 1nA (max) at TA = +25C
________________________Applications
Speaker Headset Switching MP3 Players Power Routing Battery-Operated Equipment Relay Replacement Audio and Video Signal Routing Communications Circuits PCMCIA Cards Cellular Phones Modems
UCSP is a trademark of Maxim Integrated Products, Inc. Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd.
MAX4685ETB MAX4685EUB PART MAX4684EBC MAX4684ETB MAX4684EUB MAX4685EBC
Ordering Information
TEMP RANGE -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C PIN/BUMPPACKAGE 12 UCSP* 10 Thin QFN (3 3) 10 MAX 12 UCSP* 10 Thin QFN (3 3) 10 MAX TOP MARK AAF AAG -- AAG AAH --
Note: Requires special solder temperature profile describing the Absolute Maximum Ratings section. *UCSP reliability is integrally linked to the user's assembly methods, circuit board material, and environment. Refer to the UCSP Reliability Notice in the UCSP Reliability section of this data sheet for more information.
Pin Configurations/Functional Diagrams/Truth Table
TOP VIEW MAX4684/MAX4685
GND NC1 IN1 COM1 NO1 C1 C2 C3 B1 A1 A2 A3 NC2 IN2 MAX4684/MAX4685 COM2 NO2 IN_ 0 C4 B4 V+ UCSP A4 1 NO_ OFF ON NC_ ON OFF IN1 4 NC1 5 MAX 7 6 NC2 GND V+ 1 NO1 2 COM1 3
MAX4684/MAX4685
10 NO2 9 8 COM2 IN2
Continued at end of data sheet.
SWITCHES SHOWN FOR LOGIC "0" INPUT
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
0.5/0.8 Low-Voltage, Dual SPDT Analog Switches in UCSP MAX4684/MAX4685
ABSOLUTE MAXIMUM RATINGS
(All Voltages Referenced to GND) V+, IN_......................................................................-0.3V to +6V COM_, NO_, NC_ (Note1) ........................... -0.3V to (V+ + 0.3V) Continuous Current NO_, NC_, COM_ .......................... 300mA Peak Current NO_, NC_, COM_ (pulsed at 1ms, 50% duty cycle).................................400mA Peak Current NO_, NC_, COM_ (pulsed at 1ms, 10% duty cycle).................................500mA Continuous Power Dissipation (TA = +70C) 12-Bump UCSP (derate 11.4mW/C above +70C) ...909mW 10-Pin MAX (derate 5.6mW/C above +70C) ..........444mW Operating Temperature Ranges..........................-40C to +85C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C Bump Temperature (soldering) (Note 2) Infared (15s)................................................................+220C Vapor Phase (60s) ......................................................+215C
Note 1: Signals on NO_, NC_, and COM_ exceeding V+ or GND are clamped by internal diodes. Limit forward-diode current to maximum current rating. Note 2: This device is constructed using a unique set of packaging techniques that impose a limit on the thermal profile the device can be exposed to during board level solder attach and rework. This limit permits only the use of the solder profiles recommended in the industry-standard specification, JEDEC 020A, paragraph 7.6, Table 3 for IR/VPR and Convection reflow. Preheating is required. Hand or wave soldering is not allowed.
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS--+3V SUPPLY
(V+ = +2.7V to +3.3V, VIH = +1.4V, VIL = +0.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at +3V and +25C.) (Notes 3, 9, 10)
PARAMETER ANALOG SWITCH Analog Signal Range VNO_, VNC_, VCOM_ MAX4684 NC_ On-Resistance (Note 4) RON(NC) V+ = 2.7V; ICOM_ = 100mA; VNC_ = 0 to V+ MAX4685 E +25C E +25C E +25C E +25C E MAX4684 MAX4685 E E E +25C E +25C E +25C E -1 -10 -2 -20 30 0.45 0.45 0 0.3 V+ 0.5 0.5 0.8 0.8 0.8 0.8 0.06 0.06 0.15 0.35 0.35 1 10 2 20 50 60 nA V SYMBOL CONDITIONS TA MIN TYP MAX UNITS
NO_ On-Resistance (Note 4) On-Resistance Match Between Channels (Notes 4, 5) NC_ On-Resistance Flatness (Note 6) NO_ On-Resistance Flatness (Note 6) NO_ or NC_ OffLeakage Current (Note 7) COM_ On-Leakage Current (Note 7)
RON(NO)
V+ = 2.7V; ICOM_ = 100mA; VNO_ = 0 to V+ V+ = 2.7V; ICOM_ = 100mA; VNO_ or VNC_ = 1.5V V+ = 2.7V; ICOM = 100mA; VNC_ = 0 to V+ V+ = 2.7V; ICOM = 100mA; VNO_ = 0 to V+ V+ = 3.3V; VNO_ or VNC_ = 3V, 0.3V; VCOM_ = 0.3V, 3V V+ = 3.3V; VNO_ or VNC_ = 3V, 0.3V, or floating; VCOM_ = 3V, 0.3V, or floating V+ = 2.7V, VNO_ or VNC_ = 1.5V; RL = 50; CL = 35pF; Figure 2
RON
RFLAT (NC) RFLAT (NO) INO_(OFF) or INC_(OFF) ICOM_(ON)
nA
DYNAMIC CHARACTERISTICS Turn-On Time tON ns
2
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0.5/0.8 Low-Voltage, Dual SPDT Analog Switches in UCSP
ELECTRICAL CHARACTERISTICS--+3V SUPPLY (continued)
(V+ = +2.7V to +3.3V, VIH = +1.4V, VIL = +0.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at +3V and +25C.) (Notes 3, 9, 10)
PARAMETER Turn-Off Time Break-Before-Make Delay Charge Injection Off-Isolation (Note 8) Crosstalk Total Harmonic Distortion NC_ Off-Capacitance NO_ Off-Capacitance NC_ On-Capacitance NO_ On-Capacitance DIGITAL I/O Input Logic High Input Logic Low IN_ Input Leakage Current POWER SUPPLY Power-Supply Range Supply Current (Note 4) SYMBOL tOFF tBBM Q VISO VCT THD CNC_(OFF) CNO_(OFF) CNC_(ON) CNO_(ON) VIH VIL IIN_ V+ I+ V+ = 5.5V; VIN_ = 0 or V+ VIN_ = 0 or V+ CONDITIONS V+ = 2.7V, VNO_ or VNC_ = 1.5V; RL = 50; CL = 35pF; Figure 2 V+ = 2.7V, VNO_, or VNC_ = 1.5V; RL = 50; CL = 35pF; Figure 3 COM_ = 0; RS = 0; CL = 1nF; Figure 4 CL = 5pF; RL = 50; f = 100kHz; VCOM_ = 1VRMS; Figure 5 CL = 5pF; RL = 50; f = 100kHz; VCOM_ = 1VRMS; Figure 5 RL = 600, IN_ = 2Vp-p, f = 20Hz to 20kHz f = 1MHz; Figure 6 f = 1MHz; Figure 6 f = 1MHz; Figure 6 f = 1MHz; Figure 6 TA +25C E E +25C +25C +25C +25C +25C +25C +25C +25C E E E E +25C E -1 1.8 -50 -200 1.4 0.5 1 5.5 50 200 2 15 200 -64 -68 0.03 84 37 190 150 MIN TYP 25 MAX 30 40 UNITS ns ns pC dB dB % pF pF pF pF V V A V nA
MAX4684/MAX4685
0.04
The algebraic convention used in this data sheet is where the most negative value is a minimum and the most positive value a maximum. Note 4: Guaranteed by design. Note 5: RON = RON(MAX) - RON(MIN), between NC1 and NC2 or between NO1 and NO2. Note 6: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified analog signal ranges. Note 7: Leakage parameters are 100% tested at TA = +85C, and guaranteed by correlation over rated temperature range. Note 8: Off-isolation = 20log10 (VCOM / VNO), VCOM = output, VNO = input to off switch. Note 9: UCSP and QFN parts are 100% tested at +25C only and guaranteed by design and correlation at the full hot-rated temperature. Note 10: -40C specifications are guaranteed by design. Note 3:
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0.5/0.8 Low-Voltage, Dual SPDT Analog Switches in UCSP MAX4684/MAX4685
Typical Operating Characteristics
(TA = +25C, unless otherwise noted.)
MAX4684 NC ON-RESISTANCE vs. COM VOLTAGE
MAX4684/5 toc01
MAX4685 NC ON-RESISTANCE vs. COM VOLTAGE
MAX4684/5 toc02
NO ON-RESISTANCE vs. COM VOLTAGE
V+ = +1.8V 2.0 V+ = +2.0V
MAX4684/5 toc03
1.8 1.6 1.4 1.2 RON () V+ = +1.8V
2.0 1.8 1.6 1.4 RON () 1.2 1.0 0.8 0.6 0.4 0.2 0 V+ = +2.3V V+ = +2.5V V+ = +3.0V V+ = +5.0V V+ = +2.0V V+ = +1.8V
2.5
1.0 0.8 0.6 0.4 0.2 0 0 1
V+ = +2.0V V+ = +2.3V
V+ = +5.0V
RON ()
1.5
1.0
V+ = +2.3V V+ = +2.5V V+ = +3.0V V+ = +5.0V
V+ = +2.5V V+ = +3.0V
0.5
0 0 1 2 3 VCOM (V) 4 5 0 1 2 3 VCOM (V) 4 5
2
3
4
5
VCOM (V)
MAX4684 NC ON-RESISTANCE vs. COM VOLTAGE
MAX4684/5 toc04
MAX4685 NC ON-RESISTANCE vs. COM VOLTAGE
MAX4684/5 toc05
NO ON-RESISTANCE vs. COM VOLTAGE
V+ = +5V 0.35 0.30
MAX4684/5 toc06
0.28 0.26 0.24 0.22 RON () 0.20 0.18 0.16 0.14 0.12 0.10 0 1 2 3 4 5 VCOM (V) TA = -40C TA = +85C V+ = +5V
0.45 V+ = +5V 0.40 0.35 RON ()
0.40
TA = +25C
RON ()
0.30 0.25 0.20 0.15 0.10 0 1 TA = +25C
TA = +85C
TA = +85C
0.25 0.20 TA = +25C 0.15
TA = -40C 0.10 2 3 4 5 0 1 2 3
TA = -40C 4 5
VCOM (V)
VCOM (V)
MAX4684 NC ON-RESISTANCE vs. COM VOLTAGE
MAX4684/5 toc07
MAX4684 NC ON-RESISTANCE vs. COM VOLTAGE
MAX4684/5 toc01
NO ON-RESISTANCE vs. COM VOLTAGE
V+ = +3V 0.45 0.40 RON () 0.35 0.30 0.25 0.20 0.15 0.10 TA = +25C TA = -40C TA = +85C
MAX4684/5 toc09
0.35 V+ = +3V 0.30 TA = +25C RON () TA = +85C
1.8 1.6 1.4 1.2 RON () 1.0 0.8 0.6 V+ = +2.0V V+ = +2.3V V+ = +2.5V V+ = +3.0V V+ = +5.0V V+ = +1.8V
0.50
0.25
0.20
0.15
TA = -40C
0.4 0.2
0.10 0 0.5 1.0 1.5 VCOM (V) 2.0 2.5 3.0
0 0 1 2 3 4 5 VCOM (V)
0
0.5
1.0
1.5 VCOM (V)
2.0
2.5
3.0
4
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0.5/0.8 Low-Voltage, Dual SPDT Analog Switches in UCSP MAX4684/MAX4685
Typical Operating Characteristics (continued)
(TA = +25C, unless otherwise noted.)
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX4684/5 toc10
TURN-ON/TURN-0FF TIMES vs. SUPPLY VOLTAGE
MAX4684/5 toc11
TURN-ON/TURN-0FF TIMES vs. TEMPERATURE
45 40 35 tON/tOFF (ns) tON V+ = +3V
MAX4684/5 toc12
100
80 70 60 tON/tOFF (ns) 50 40 30 20 tOFF tON
50
80 SUPPLY CURRENT (pA)
60
30 25 20 15 10 tOFF
40
20 10 0 0 1 2 3 VSUPPLY (V) 4 5 6 0 1.8 2.3 2.8 3.3 3.8 4.3 4.8 5.3 VSUPPLY (V)
5 0 -40 -15 10 35 60 85 TEMPERATURE (C)
LOGIC THRESHOLD VOLTAGE vs. SUPPLY VOLTAGE
MAX4684/5 toc13
CHARGE INJECTION vs. COM VOLTAGE
200 100 0 Q (pC)
MAX4684/5 toc14
MAX4684 ON/OFF-LEAKAGE CURRENT vs. TEMPERATURE
MAX4684/5 toc15
2.0 LOGIC THRESHOLD VOLTAGE (V)
300
1000 ON/OFF-LEAKAGE CURRENT (pA)
1.5
VIN RISING
100
1.0 VIN FALLING 0.5
-100 -200 -300 -400
ICOM(ON) 10
ICOM(OFF) 1 0 1 2 3 VCOM (V) 4 5 6 -40 -15 10 35 60 85 TEMPERATURE (C)
0 0 1 2 3 VSUPPLY (V) 4 5 6
-500
MAX4685 ON/OFF-LEAKAGE CURRENT vs. TEMPERATURE
MAX4684/5 toc16
FREQUENCY RESPONSE (MAX)
ONRESPONSE
MAX4684/85 toc17
TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY
MAX4684/5 toc18
1000 ON/OFF-LEAKAGE CURRENT (pA)
0 -20 -40 LOSS (dB)
0.1
100 ICOM(ON)
-60 -80
CROSSTALK
10 ICOM(OFF) 1 -40 -15 10 35 60 85 TEMPERATURE (C)
-100 -120 0.001 0.01 0.01 0.1 1 10 100 10 100 1k FREQUENCY (Hz) 10k 100k FREQUENCY (MHz)
_______________________________________________________________________________________
THD + N (%)
OFFISOLATION
5
0.5/0.8 Low-Voltage, Dual SPDT Analog Switches in UCSP MAX4684/MAX4685
Pin Description
PIN NAME UCSP NC_ IN_ COM_ NO_ V+ GND A1, C1 A2, C2 A3, C3 A4, C4 B4 B1 MAX 5, 7 4, 8 3, 9 2, 10 1 6 Analog Switch--Normally Closed Terminal Digital Control Input Analog Switch--Common Terminal Analog Switch--Normally Open Terminal Positive Supply Voltage Input Ground FUNCTION
Detailed Description
The MAX4684/MAX4685 are low on-resistance, lowvoltage, dual SPDT analog switches that operate from a +1.8V to +5.5V supply. The devices are fully specified for nominal 3V applications. The MAX4684/MAX4685 have break-before-make switching and fast switching speeds (tON = 50ns max, tOFF = 40ns max). The MAX4684 offers asymmetrical normally closed (NC) and normally open (NO) RON for applications that require asymmetrical loads (examples include speaker headsets and internal speakers). The part features a 0.5 max RON for its NC switch and a 0.8 max RON for its NO switch at the 2.7V supply. The MAX4685 features a 0.8 max on-resistance for both NO and NC switches at the +2.7V supply.
Power-Supply Sequencing and Overvoltage Protection
Caution: Do not exceed the absolute maximum ratings because stresses beyond the listed ratings may cause permanent damage to devices. Proper power-supply sequencing is recommended for all CMOS devices. Always apply V+ before applying analog signals, especially if the analog signal is not current limited. If this sequencing is not possible, and if the analog inputs are not current limited to <20mA, add a small signal diode (D1) as shown in Figure 1. Adding a protection diode reduces the analog range to a diode drop (about 0.7V) below V+ (for D1). R ON increases slightly at low supply voltages. Maximum supply voltage (V+) must not exceed +6V. Protection diode D1 also protects against some overvoltage situations. No damage will result on Figure 1's circuit if the supply voltage is below the absolute maximum rating applied to an analog signal pin.
Applications Information
Digital Control Inputs
The MAX4684/MAX4685 logic inputs accept up to +5.5V regardless of supply voltage. For example, with a +3.3V supply, IN_ may be driven low to GND and high to 5.5V. Driving IN_ rail-to-rail minimizes power consumption. Logic levels for a +1.8V supply are 0.5V (low) and 1.4V (high).
POSITIVE SUPPLY D1 V+
Analog Signal Levels
Analog signals that range over the entire supply voltage (V+ to GND) are passed with very little change in on-resistance (see Typical Operating Characteristics). The switches are bidirectional, so the NO_, NC_, and COM_ pins can be either inputs or outputs.
NO Vg COM
MAX4684 MAX4685
GND
Figure 1. Overvoltage Protection Using Two External Blocking Diodes 6 _______________________________________________________________________________________
0.5/0.8 Low-Voltage, Dual SPDT Analog Switches in UCSP
UCSP Package Consideration
For general UCSP package information and PC layout considerations, please refer to the Maxim Application Note (Wafer-Level Ultra-Chip-Board-Scale Package). Mechanical stress performance is a greater consideration for a UCSP package. UCSPs are attached through direct solder contact to the user's PC board, foregoing the inherent stress relief of a packaged product lead frame. Solder joint contact integrity must be considered. Information on Maxim's qualification plan, test data, and recommendations are detailed in the UCSP application note, which can be found on Maxim's website at www.maxim-ic.com.
MAX4684/MAX4685
UCSP Reliability
The chip-scale package (UCSP) represents a unique packaging form factor that may not perform equally to a packaged product through traditional mechanical reliability tests. UCSP reliability is integrally linked to the user's assembly methods, circuit board material, and usage environment. The user should closely review these areas when considering use of a UCSP package. Performance through Operating Life Test and Moisture Resistance remains uncompromised as it is primarily determined by the wafer-fabrication process.
Chip Information
TRANSISTOR COUNT: 198
Test Circuits/Timing Diagrams
MAX4684 MAX4685
VIN_ NO_ OR NC V+ V+ COM_ RL 50 IN_ LOGIC INPUT GND SWITCH OUTPUT 0 t ON LOGIC INPUT VOUT CL 35pF VOUT 0.9 x V0UT t OFF 0.9 x VOUT VIH 50% VIL t r < 5ns t f < 5ns
VOUT = VN_
CL INCLUDES FIXTURE AND STRAY CAPACITANCE. RL RL + RON
(
)
LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES THAT HAVE THE OPPOSITE LOGIC SENSE.
Figure 2. Switching Time
MAX4684 MAX4685
VN_ NC_ NO_ IN_ LOGIC INPUT GND
V+ V+ COM_ RL 50 VOUT CL 35pF LOGIC INPUT
VIH 50% VIL
VOUT tD CL INCLUDES FIXTURE AND STRAY CAPACITANCE.
0.9 x VOUT
Figure 3. Break-Before-Make Interval _______________________________________________________________________________________ 7
0.5/0.8 Low-Voltage, Dual SPDT Analog Switches in UCSP MAX4684/MAX4685
Test Circuits/Timing Diagrams (continued)
V+
MAX4684 MAX4685
RGEN NC_ OR NO_ GND IN_
VOUT VOUT VOUT CL IN OFF ON OFF
V+ COM_
V GEN
VIL TO VIH
IN
OFF
ON Q = (V OUT )(C L )
OFF
IN DEPENDS ON SWITCH CONFIGURATION; INPUT POLARITY DETERMINED BY SENSE OF SWITCH.
Figure 4. Charge Injection
+5V 10nF NETWORK ANALYZER 0V OR V+ IN_ V+ COM VIN 50 50
V OFF-ISOLATION = 20log OUT VIN V ON-LOSS = 20log OUT VIN V CROSSTALK = 20log OUT VIN
NC_ 50
MAX4684 MAX4685
NO GND
VOUT
MEAS
REF
50
50
MEASUREMENTS ARE STANDARDIZED AGAINST SHORTS AT IC TERMINALS. OFF-ISOLATION IS MEASURED BETWEEN COM_ AND "OFF" NO_ OR NC_ TERMINAL ON EACH SWITCH. ON-LOSS IS MEASURED BETWEEN COM_ AND "ON" NO_ OR NC_ TERMINAL ON EACH SWITCH. CROSSTALK IS MEASURED FROM ONE CHANNEL TO ALL OTHER CHANNELS. SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED.
Figure 5. On-Loss, Off-Isolation, and Crosstalk
10nF
V+
Pin Configurations (continued)
TOP VIEW MAX4684/MAX4685
V+
IN VIL OR VIH
V+ COM_
MAX4684 MAX4685
1 2 3 4 5
10 NO2 9 COM2 8 IN2 7 NC2 6 GND
NO1 COM1 IN1 NC1
CAPACITANCE METER f = 1MHz
NC_ or NO_ GND
Figure 6. Channel Off/On-Capacitance 8
3 3 THIN QFN
_______________________________________________________________________________________
0.5/0.8 Low-Voltage, Dual SPDT Analog Switches in UCSP MAX4684/MAX4685
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
12L, UCSP 4x3.EPS
_______________________________________________________________________________________
9
0.5/0.8 Low-Voltage, Dual SPDT Analog Switches in UCSP MAX4684/MAX4685
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
e
10
4X S
10
INCHES MAX DIM MIN 0.043 A 0.006 A1 0.002 A2 0.030 0.037 D1 0.116 0.120 0.114 0.118 D2 0.116 E1 0.120 E2 0.114 0.118 H 0.187 0.199 L 0.0157 0.0275 L1 0.037 REF b 0.007 0.0106 e 0.0197 BSC c 0.0035 0.0078 0.0196 REF S 0 6
MILLIMETERS MAX MIN 1.10 0.15 0.05 0.75 0.95 3.05 2.95 3.00 2.89 3.05 2.95 2.89 3.00 4.75 5.05 0.40 0.70 0.940 REF 0.177 0.270 0.500 BSC 0.090 0.200 0.498 REF 0 6
H y 0.500.1 0.60.1
1
1
0.60.1
TOP VIEW
BOTTOM VIEW
D2 GAGE PLANE A2 A b A1 D1
E2
c
E1 L1
L
FRONT VIEW
SIDE VIEW
PROPRIETARY INFORMATION TITLE:
PACKAGE OUTLINE, 10L uMAX/uSOP
APPROVAL DOCUMENT CONTROL NO. REV.
21-0061
1 1
I
10
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10LUMAX.EPS
0.5/0.8 Low-Voltage, Dual SPDT Analog Switches in UCSP
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) 6, 8, &10L, QFN THIN.EPS
MAX4684/MAX4685
L D A A2
PIN 1 ID
D2
1
N
1
b
PIN 1 INDEX AREA
C0.35 [(N/2)-1] x e REF. e
E
DETAIL A
E2
A1
k
C L
C L
L e A e
L
SEMICONDUCTOR
PROPRIETARY INFORMATION TITLE:
DALLAS
PACKAGE OUTLINE, 6, 8 & 10L, TDFN, EXPOSED PAD, 3x3x0.80 mm
NUMBER OF LEADS SHOWN ARE FOR REFERENCE ONLY
APPROVAL DOCUMENT CONTROL NO. REV.
1 2
21-0137
D
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11
0.5/0.8 Low-Voltage, Dual SPDT Analog Switches in UCSP MAX4684/MAX4685
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
COMMON DIMENSIONS SYMBOL A D E A1 L k A2 MIN. 0.70 2.90 2.90 0.00 0.20 MAX. 0.80 3.10 3.10 0.05 0.40
0.25 MIN. 0.20 REF.
PACKAGE VARIATIONS PKG. CODE T633-1 T833-1 T1033-1 N 6 8 10 D2 1.500.10 1.500.10 1.500.10 E2 2.300.10 2.300.10 2.300.10 e 0.95 BSC 0.65 BSC 0.50 BSC JEDEC SPEC MO229 / WEEA MO229 / WEEC MO229 / WEED-3 b 0.400.05 0.300.05 0.250.05 [(N/2)-1] x e 1.90 REF 1.95 REF 2.00 REF
SEMICONDUCTOR
PROPRIETARY INFORMATION TITLE:
DALLAS
PACKAGE OUTLINE, 6, 8 & 10L, TDFN, EXPOSED PAD, 3x3x0.80 mm
APPROVAL DOCUMENT CONTROL NO. REV.
2 2
21-0137
D
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2003 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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